3D-SiP Packaging Technology Forum
Date:   Tuesday, Nov 26th, 2019
Time:   09:00 – 16:00
Venue: 3F, Sheraton Hotel Hsinchu (No. 265, Dong Sec. 1, Guangming6thRd, ZubeiCity 302,  Hsinchu County)

Target Audiences: 
Fabless, Packaging house, Equipment Suppliers, Materials Suppliers, Technical manager and above, Dept. Head, Sr. Technical Engineer, Procurement, Researcher, Academia, BDM, Marcom, Media 

Registration Fee: NTD$ 4,500 [click to register]
No of Attendee: 150 pax

Organizer:  HiConnectInternational
Co-organizer:   TSIA / TSRI / TIARA

08:40–09:10 Registration
09:10–09:17 Opening Remarks
Mr. Akshay Singh, VP of Advanced Packaging Technology Development, Micron
09:17–09:20 Welcome by Moderator
Mr. Albert Lan 藍章益, Senior Technical Director, AMAT 
09:20–10:30 Opening Keynote
Dr. Marvin Liao 廖德堆, Vice President, Operations / Product Development / APTS, TSMC

Carrier Wafer Bonding/Debonding for Thinner Wafer Processing
10:30–10:40 Break
Advanced Bonding and Molding Technologies for next generation 3D and SIP
Dr. Ruurd Boomsma, CTO of Besi

Higher Resolution & Throughput AOI Wafer Inspection Solutions
New generation thick film photoresists for advanced packaging
Dr. PingHung Lu, Head of Technical Marketing & Application Engineering/ Thick Film Resists, Merck
12:10–13:40 Lunch / Registration
Welcome by TIARA

High resolution photoresist for thicker metal bumping processing
Mr. Yasushi Washio, Superior Technical Specialist, TOK
Next generation lithography solution in 3D SiP Packaging technology
14:40–14:50 Break
PVD Developments for High Density
Mr. Mike Cheng, Application Manager Asia & Senior Service Manager, SPTS

Closing Keynote 
Dr. Kuan-Neng Chen, IEEE Fellow, VP & Micron Chair Professor, NCTU